# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
%YAML 1.2
---
$id: http://devicetree.org/schemas/clock/rockchip,rk3562-cru.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#

title: Rockchip rk3562 Clock and Reset Control Module

maintainers:
  - Elaine Zhang <zhangqing@rock-chips.com>
  - Heiko Stuebner <heiko@sntech.de>

description:
  The RK3562 clock controller generates the clock and also implements a reset
  controller for SoC peripherals. For example it provides SCLK_UART2 and
  PCLK_UART2, as well as SRST_P_UART2 and SRST_S_UART2 for the second UART
  module.

properties:
  compatible:
    const: rockchip,rk3562-cru

  reg:
    maxItems: 1

  "#clock-cells":
    const: 1

  "#reset-cells":
    const: 1

  clocks:
    maxItems: 2

  clock-names:
    items:
      - const: xin24m
      - const: xin32k

required:
  - compatible
  - reg
  - "#clock-cells"
  - "#reset-cells"

additionalProperties: false

examples:
  - |
    clock-controller@ff100000 {
      compatible = "rockchip,rk3562-cru";
      reg = <0xff100000 0x40000>;
      #clock-cells = <1>;
      #reset-cells = <1>;
    };
