# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
%YAML 1.2
---
$id: http://devicetree.org/schemas/cpufreq/apple,cluster-cpufreq.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#

title: Apple SoC cluster cpufreq device

maintainers:
  - Hector Martin <marcan@marcan.st>

description: |
  Apple SoCs (e.g. M1) have a per-cpu-cluster DVFS controller that is part of
  the cluster management register block. This binding uses the standard
  operating-points-v2 table to define the CPU performance states, with the
  opp-level property specifying the hardware p-state index for that level.

properties:
  compatible:
    oneOf:
      - items:
          - enum:
              - apple,t8103-cluster-cpufreq
              - apple,t8112-cluster-cpufreq
          - const: apple,cluster-cpufreq
      - items:
          - enum:
              - apple,s8000-cluster-cpufreq
              - apple,t8010-cluster-cpufreq
              - apple,t8015-cluster-cpufreq
              - apple,t6000-cluster-cpufreq
          - const: apple,t8103-cluster-cpufreq
          - const: apple,cluster-cpufreq
      - items:
          - const: apple,t7000-cluster-cpufreq
          - const: apple,s5l8960x-cluster-cpufreq
      - const: apple,s5l8960x-cluster-cpufreq
      - items:
          - const: apple,t6020-cluster-cpufreq
          - const: apple,t8112-cluster-cpufreq

  reg:
    maxItems: 1

  '#performance-domain-cells':
    const: 0

required:
  - compatible
  - reg
  - '#performance-domain-cells'

additionalProperties: false

examples:
  - |
    // This example shows a single CPU per domain and 2 domains,
    // with two p-states per domain.
    // Shipping hardware has 2-4 CPUs per domain and 2-6 domains.
    cpus {
      #address-cells = <2>;
      #size-cells = <0>;

      cpu@0 {
        compatible = "apple,icestorm";
        device_type = "cpu";
        reg = <0x0 0x0>;
        operating-points-v2 = <&ecluster_opp>;
        performance-domains = <&cpufreq_e>;
      };

      cpu@10100 {
        compatible = "apple,firestorm";
        device_type = "cpu";
        reg = <0x0 0x10100>;
        operating-points-v2 = <&pcluster_opp>;
        performance-domains = <&cpufreq_p>;
      };
    };

    ecluster_opp: opp-table-0 {
      compatible = "operating-points-v2";
      opp-shared;

      opp01 {
        opp-hz = /bits/ 64 <600000000>;
        opp-level = <1>;
        clock-latency-ns = <7500>;
      };
      opp02 {
        opp-hz = /bits/ 64 <972000000>;
        opp-level = <2>;
        clock-latency-ns = <22000>;
      };
    };

    pcluster_opp: opp-table-1 {
      compatible = "operating-points-v2";
      opp-shared;

      opp01 {
        opp-hz = /bits/ 64 <600000000>;
        opp-level = <1>;
        clock-latency-ns = <8000>;
      };
      opp02 {
        opp-hz = /bits/ 64 <828000000>;
        opp-level = <2>;
        clock-latency-ns = <19000>;
      };
    };

    soc {
      #address-cells = <2>;
      #size-cells = <2>;

      cpufreq_e: performance-controller@210e20000 {
        compatible = "apple,t8103-cluster-cpufreq", "apple,cluster-cpufreq";
        reg = <0x2 0x10e20000 0 0x1000>;
        #performance-domain-cells = <0>;
      };

      cpufreq_p: performance-controller@211e20000 {
        compatible = "apple,t8103-cluster-cpufreq", "apple,cluster-cpufreq";
        reg = <0x2 0x11e20000 0 0x1000>;
        #performance-domain-cells = <0>;
      };
    };
