# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/net/renesas,rzv2h-gbeth.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#

title: GBETH glue layer for Renesas RZ/V2H(P) (and similar SoCs)

maintainers:
  - Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>

select:
  properties:
    compatible:
      contains:
        enum:
          - renesas,r9a09g047-gbeth
          - renesas,r9a09g056-gbeth
          - renesas,r9a09g057-gbeth
          - renesas,r9a09g077-gbeth
          - renesas,r9a09g087-gbeth
          - renesas,rzv2h-gbeth
  required:
    - compatible

properties:
  compatible:
    oneOf:
      - items:
          - const: renesas,r9a08g046-gbeth # RZ/G3L
          - const: snps,dwmac-5.30a
      - items:
          - enum:
              - renesas,r9a09g047-gbeth # RZ/G3E
              - renesas,r9a09g056-gbeth # RZ/V2N
              - renesas,r9a09g057-gbeth # RZ/V2H(P)
          - const: renesas,rzv2h-gbeth
          - const: snps,dwmac-5.20
      - items:
          - const: renesas,r9a09g077-gbeth # RZ/T2H
          - const: snps,dwmac-5.20
      - items:
          - const: renesas,r9a09g087-gbeth # RZ/N2H
          - const: renesas,r9a09g077-gbeth
          - const: snps,dwmac-5.20

  reg:
    maxItems: 1

  clocks:
    oneOf:
      - items:
          - description: CSR/Register access clock
          - description: AXI system/Main clock
          - description: PTP clock
          - description: TX clock
          - description: RX clock
          - description: TX clock phase-shifted by 180 degrees
          - description: RX clock phase-shifted by 180 degrees
          - description: RMII clock
          - description: RMII TX clock
          - description: RMII RX clock

        minItems: 7

      - items:
          - description: CSR clock
          - description: AXI system clock
          - description: TX clock

  clock-names:
    oneOf:
      - items:
          - const: stmmaceth
          - const: pclk
          - const: ptp_ref
          - const: tx
          - const: rx
          - const: tx-180
          - const: rx-180
          - const: rmii
          - const: rmii_tx
          - const: rmii_rx

        minItems: 7

      - items:
          - const: stmmaceth
          - const: pclk
          - const: tx

  interrupt-names:
    oneOf:
      - items:
          - const: macirq
          - const: eth_wake_irq
          - const: eth_lpi
          - const: rx-queue-0
          - const: rx-queue-1
          - const: rx-queue-2
          - const: rx-queue-3
          - const: tx-queue-0
          - const: tx-queue-1
          - const: tx-queue-2
          - const: tx-queue-3
      - items:
          - const: macirq
          - const: eth_wake_irq
          - const: eth_lpi
          - const: rx-queue-0
          - const: rx-queue-1
          - const: rx-queue-2
          - const: rx-queue-3
          - const: tx-queue-0
          - const: tx-queue-1
          - const: tx-queue-2
          - const: tx-queue-3
          - const: ptp-pps-0
          - const: ptp-pps-1
          - const: ptp-pps-2
          - const: ptp-pps-3
      - items:
          - const: macirq
          - const: eth_wake_irq
          - const: eth_lpi
          - const: rx-queue-0
          - const: rx-queue-1
          - const: rx-queue-2
          - const: rx-queue-3
          - const: rx-queue-4
          - const: rx-queue-5
          - const: rx-queue-6
          - const: rx-queue-7
          - const: tx-queue-0
          - const: tx-queue-1
          - const: tx-queue-2
          - const: tx-queue-3
          - const: tx-queue-4
          - const: tx-queue-5
          - const: tx-queue-6
          - const: tx-queue-7

  resets:
    oneOf:
      - items:
          - description: AXI power-on system reset
      - items:
          - description: AXI power-on system reset
          - description: AHB reset

  pcs-handle:
    description:
      phandle pointing to a PCS sub-node compatible with
      Documentation/devicetree/bindings/net/pcs/renesas,rzn1-miic.yaml#
      (Refer RZ/T2H portion in the DT-binding file)

required:
  - compatible
  - reg
  - clocks
  - clock-names
  - interrupts
  - interrupt-names
  - resets

allOf:
  - $ref: snps,dwmac.yaml#

  - if:
      properties:
        compatible:
          contains:
            const: renesas,r9a08g046-gbeth
    then:
      properties:
        clocks:
          minItems: 10

        clock-names:
          minItems: 10

        interrupts:
          minItems: 15
          maxItems: 15

        interrupt-names:
          minItems: 15
          maxItems: 15

  - if:
      properties:
        compatible:
          contains:
            const: renesas,r9a09g077-gbeth
    then:
      properties:
        clocks:
          maxItems: 3

        clock-names:
          maxItems: 3

        interrupts:
          minItems: 19

        interrupt-names:
          minItems: 19

        resets:
          minItems: 2

        reset-names:
          minItems: 2

      required:
        - reset-names
    else:
      properties:
        resets:
          maxItems: 1

        pcs-handle: false

        reset-names: false

  - if:
      properties:
        compatible:
          contains:
            const: renesas,rzv2h-gbeth
    then:
      properties:
        clocks:
          maxItems: 7

        clock-names:
          maxItems: 7

        interrupts:
          minItems: 11
          maxItems: 11

        interrupt-names:
          minItems: 11
          maxItems: 11

unevaluatedProperties: false

examples:
  - |
    #include <dt-bindings/clock/renesas-cpg-mssr.h>
    #include <dt-bindings/interrupt-controller/arm-gic.h>

    ethernet@15c30000 {
        compatible = "renesas,r9a09g057-gbeth", "renesas,rzv2h-gbeth", "snps,dwmac-5.20";
        reg = <0x15c30000 0x10000>;
        clocks =  <&cpg CPG_MOD 0xbd>, <&cpg CPG_MOD 0xbc>,
                  <&ptp_clock>, <&cpg CPG_MOD 0xb8>,
                  <&cpg CPG_MOD 0xb9>, <&cpg CPG_MOD 0xba>,
                  <&cpg CPG_MOD 0xbb>;
        clock-names = "stmmaceth", "pclk", "ptp_ref",
                      "tx", "rx", "tx-180", "rx-180";
        resets = <&cpg 0xb0>;
        interrupts = <GIC_SPI 765 IRQ_TYPE_LEVEL_HIGH>,
                     <GIC_SPI 767 IRQ_TYPE_LEVEL_HIGH>,
                     <GIC_SPI 766 IRQ_TYPE_LEVEL_HIGH>,
                     <GIC_SPI 772 IRQ_TYPE_LEVEL_HIGH>,
                     <GIC_SPI 773 IRQ_TYPE_LEVEL_HIGH>,
                     <GIC_SPI 774 IRQ_TYPE_LEVEL_HIGH>,
                     <GIC_SPI 745 IRQ_TYPE_LEVEL_HIGH>,
                     <GIC_SPI 768 IRQ_TYPE_LEVEL_HIGH>,
                     <GIC_SPI 769 IRQ_TYPE_LEVEL_HIGH>,
                     <GIC_SPI 770 IRQ_TYPE_LEVEL_HIGH>,
                     <GIC_SPI 771 IRQ_TYPE_LEVEL_HIGH>;
        interrupt-names = "macirq", "eth_wake_irq", "eth_lpi",
                          "rx-queue-0", "rx-queue-1", "rx-queue-2",
                          "rx-queue-3", "tx-queue-0", "tx-queue-1",
                          "tx-queue-2", "tx-queue-3";
        phy-mode = "rgmii-id";
        snps,multicast-filter-bins = <256>;
        snps,perfect-filter-entries = <128>;
        rx-fifo-depth = <8192>;
        tx-fifo-depth = <8192>;
        snps,fixed-burst;
        snps,force_thresh_dma_mode;
        snps,axi-config = <&stmmac_axi_setup>;
        snps,mtl-rx-config = <&mtl_rx_setup>;
        snps,mtl-tx-config = <&mtl_tx_setup>;
        snps,txpbl = <32>;
        snps,rxpbl = <32>;
        phy-handle = <&phy0>;

        stmmac_axi_setup: stmmac-axi-config {
            snps,lpi_en;
            snps,wr_osr_lmt = <0xf>;
            snps,rd_osr_lmt = <0xf>;
            snps,blen = <16 8 4 0 0 0 0>;
        };

        mtl_rx_setup: rx-queues-config {
            snps,rx-queues-to-use = <4>;
            snps,rx-sched-sp;

            queue0 {
                snps,dcb-algorithm;
                snps,priority = <0x1>;
                snps,map-to-dma-channel = <0>;
            };

            queue1 {
                snps,dcb-algorithm;
                snps,priority = <0x2>;
                snps,map-to-dma-channel = <1>;
            };

            queue2 {
                snps,dcb-algorithm;
                snps,priority = <0x4>;
                snps,map-to-dma-channel = <2>;
            };

            queue3 {
                snps,dcb-algorithm;
                snps,priority = <0x8>;
                snps,map-to-dma-channel = <3>;
            };
        };

        mtl_tx_setup: tx-queues-config {
            snps,tx-queues-to-use = <4>;

            queue0 {
                snps,dcb-algorithm;
                snps,priority = <0x1>;
            };

            queue1 {
                snps,dcb-algorithm;
                snps,priority = <0x2>;
            };

            queue2 {
                snps,dcb-algorithm;
                snps,priority = <0x4>;
            };

            queue3 {
                snps,dcb-algorithm;
                snps,priority = <0x1>;
            };
        };

        mdio {
            #address-cells = <1>;
            #size-cells = <0>;
            compatible = "snps,dwmac-mdio";

            phy0: ethernet-phy@0 {
                reg = <0>;
            };
        };
    };
