# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/spmi/mediatek,mt8196-spmi.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#

title: MediaTek MT8196 SPMI 2.0 Controller

maintainers:
  - Hsin-Hsiung Wang <hsin-hsiung.wang@mediatek.com>
  - AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>

description:
  The MediaTek MT8196 SoC features a SPMI version 2.0 compliant controller,
  with internal wrapping arbitration logic to allow for multiple on-chip
  devices to control up to two SPMI buses.
  The main arbiter also acts as an interrupt controller, arbitering also
  the interrupts coming from SPMI-connected devices into each of the nested
  interrupt controllers from any of the present SPMI buses.

properties:
  compatible:
    oneOf:
      - enum:
          - mediatek,mt8196-spmi
      - items:
          - enum:
              - mediatek,mt6991-spmi
          - const: mediatek,mt8196-spmi

  ranges: true

  '#address-cells':
    const: 1

  '#size-cells':
    const: 1

patternProperties:
  "^spmi@[a-f0-9]+$":
    type: object
    $ref: /schemas/spmi/spmi.yaml
    unevaluatedProperties: false

    properties:
      reg:
        items:
          - description: controller interface registers
          - description: spmi master controller registers

      reg-names:
        items:
          - const: pmif
          - const: spmimst

      clocks:
        items:
          - description: controller interface system clock
          - description: controller interface timer clock
          - description: spmi controller master clock

      clock-names:
        items:
          - const: pmif_sys_ck
          - const: pmif_tmr_ck
          - const: spmimst_clk_mux

      interrupts:
        maxItems: 1

      interrupt-names:
        const: rcs

      interrupt-controller: true

      "#interrupt-cells":
        const: 3
        description: |
          cell 1: slave ID for the requested interrupt (0-15)
          cell 2: the requested peripheral interrupt (0-7)
          cell 3: interrupt flags indicating level-sense information,
                  as defined in dt-bindings/interrupt-controller/irq.h
    required:
      - reg
      - reg-names
      - clocks
      - clock-names
      - interrupts
      - interrupt-names
      - interrupt-controller
      - "#interrupt-cells"

required:
  - compatible
  - ranges
  - '#address-cells'
  - '#size-cells'

additionalProperties: false

examples:
  - |
    #include <dt-bindings/interrupt-controller/arm-gic.h>

    soc {
      #address-cells = <2>;
      #size-cells = <2>;

      spmi-arbiter@1c018000 {
        compatible = "mediatek,mt8196-spmi";
        ranges = <0 0 0x1c018000 0x4900>;
        #address-cells = <1>;
        #size-cells = <1>;

        spmi@0 {
          reg = <0 0x900>, <0x4800 0x100>;
          reg-names = "pmif", "spmimst";
          interrupts-extended = <&pio 292 IRQ_TYPE_LEVEL_HIGH>;
          interrupt-names = "rcs";
          interrupt-controller;
          #interrupt-cells = <3>;
          clocks = <&pmif_sys>, <&pmif_tmr>, <&spmi_mst>;
          clock-names = "pmif_sys_ck", "pmif_tmr_ck", "spmimst_clk_mux";
        };

        spmi@2000 {
          reg = <0x2000 0x900>, <0x4000 0x100>;
          reg-names = "pmif", "spmimst";
          interrupts-extended = <&pio 291 IRQ_TYPE_LEVEL_HIGH>;
          interrupt-names = "rcs";
          interrupt-controller;
          #interrupt-cells = <3>;
          clocks = <&pmif_sys>, <&pmif_tmr>, <&spmi_mst>;
          clock-names = "pmif_sys_ck", "pmif_tmr_ck", "spmimst_clk_mux";
        };
      };
    };
...
