// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
 * Copyright (C) 2025 Lukas Schmid <lukas.schmid@netcube.li>
 */

/dts-v1/;
#include "sun8i-t113s.dtsi"

#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/interrupt-controller/irq.h>

/ {
	model = "NetCube Systems Nagami SoM";
	compatible = "netcube,nagami", "allwinner,sun8i-t113s";

	aliases {
		serial1 = &uart1; // ESP32 Bootloader UART
		serial3 = &uart3; // Console UART on Card Edge
		ethernet0 = &emac;
	};

	chosen {
		stdout-path = "serial3:115200n8";
	};

	/* module wide 3.3V supply directly from the card edge */
	reg_vcc3v3: regulator-3v3 {
		compatible = "regulator-fixed";
		regulator-name = "vcc-3v3";
		regulator-min-microvolt = <3300000>;
		regulator-max-microvolt = <3300000>;
		regulator-always-on;
	};

	/* SY8008 DC/DC regulator on the board, also supplying VDD-SYS */
	reg_vcc_core: regulator-core {
		compatible = "regulator-fixed";
		regulator-name = "vcc-core";
		regulator-min-microvolt = <880000>;
		regulator-max-microvolt = <880000>;
		vin-supply = <&reg_vcc3v3>;
	};

	/* USB0 MUX to switch connect to Card-Edge only after BootROM */
	usb0_sec_mux: mux-controller{
		compatible = "gpio-mux";
		#mux-control-cells = <0>;
		mux-gpios = <&pio 3 9 GPIO_ACTIVE_HIGH>; /* PD9 */
		idle-state = <1>; /* USB connected to Card-Edge by default */
	};

	/* Reset of ESP32 */
	wifi_pwrseq: wifi-pwrseq {
		compatible = "mmc-pwrseq-simple";
		reset-gpios = <&pio 6 9 GPIO_ACTIVE_LOW>; /* PG9 */
		post-power-on-delay-ms = <1500>;
		power-off-delay-us = <200>;
	};
};

&cpu0 {
	cpu-supply = <&reg_vcc_core>;
};

&cpu1 {
	cpu-supply = <&reg_vcc_core>;
};

&dcxo {
	clock-frequency = <24000000>;
};

&emac {
	nvmem-cells = <&eth0_macaddress>;
	nvmem-cell-names = "mac-address";
	phy-handle = <&lan8720a>;
	phy-mode = "rmii";
	pinctrl-0 = <&rmii_pe_pins>;
	pinctrl-names = "default";
	status = "okay";
};

/* Default I2C Interface on Card-Edge */
&i2c2 {
	pinctrl-0 = <&i2c2_pd_pins>;
	pinctrl-names = "default";
	status = "disabled";
};

/* Exposed as the QWIIC connector and used by the internal EEPROM */
&i2c3 {
	pinctrl-0 = <&i2c3_pg_pins>;
	pinctrl-names = "default";
	status = "okay";

	eeprom0: eeprom@50 {
		compatible = "atmel,24c02";		/* actually it's a 24AA02E48 */
		reg = <0x50>;
		pagesize = <16>;
		read-only;
		vcc-supply = <&reg_vcc3v3>;

		#address-cells = <1>;
		#size-cells = <1>;

		eth0_macaddress: macaddress@fa {
			reg = <0xfa 0x06>;
		};
	};
};

/* Default I2S Interface on Card-Edge */
&i2s1 {
	pinctrl-0 = <&i2s1_pins>, <&i2s1_din0_pin>, <&i2s1_dout0_pin>;
	pinctrl-names = "default";
	status = "disabled";
};

/* Phy is on SoM. MDI signals pre-magnetics are on the card edge */
&mdio {
	lan8720a: ethernet-phy@0 {
		compatible = "ethernet-phy-ieee802.3-c22";
		reg = <0>;
	};
};

/* Default SD Interface on Card-Edge */
&mmc0 {
	pinctrl-0 = <&mmc0_pins>;
	pinctrl-names = "default";
	status = "disabled";
};

/* Connected to the on-board ESP32 */
&mmc1 {
	pinctrl-0 = <&mmc1_pins>;
	pinctrl-names = "default";
	vmmc-supply = <&reg_vcc3v3>;
	bus-width = <4>;
	non-removable;
	mmc-pwrseq = <&wifi_pwrseq>;
	status = "okay";
};

/* Connected to the on-board eMMC */
&mmc2 {
	pinctrl-0 = <&mmc2_pins>;
	pinctrl-names = "default";
	vmmc-supply = <&reg_vcc3v3>;
	vqmmc-supply = <&reg_vcc3v3>;
	bus-width = <4>;
	non-removable;
	status = "okay";
};

&pio {
	vcc-pb-supply = <&reg_vcc3v3>;
	vcc-pc-supply = <&reg_vcc3v3>;
	vcc-pd-supply = <&reg_vcc3v3>;
	vcc-pe-supply = <&reg_vcc3v3>;
	vcc-pf-supply = <&reg_vcc3v3>;
	vcc-pg-supply = <&reg_vcc3v3>;

	gpio-line-names = "", "", "", "", // PA
			  "", "", "", "",
			  "", "", "", "",
			  "", "", "", "",
			  "", "", "", "",
			  "", "", "", "",
			  "", "", "", "",
			  "", "", "", "",
			  "", "", "CAN0_TX", "CAN0_RX", // PB
			  "CAN1_TX", "CAN1_RX", "UART3_TX", "UART3_RX",
			  "", "", "", "",
			  "", "", "", "",
			  "", "", "", "",
			  "", "", "", "",
			  "", "", "", "",
			  "", "", "", "",
			  "", "", "eMMC_CLK", "eMMC_CMD", // PC
			  "eMMC_D2", "eMMC_D1", "eMMC_D0", "eMMC_D3",
			  "", "", "", "",
			  "", "", "", "",
			  "", "", "", "",
			  "", "", "", "",
			  "", "", "", "",
			  "", "", "", "",
			  "", "", "", "", // PD
			  "", "", "", "",
			  "", "USB_SEC_EN", "SPI1_CS", "SPI1_CLK",
			  "SPI1_MOSI", "SPI1_MISO", "SPI1_HOLD", "SPI1_WP",
			  "PD16", "", "", "",
			  "I2C2_SCL", "I2C2_SDA", "PD22", "",
			  "", "", "", "",
			  "", "", "", "",
			  "ETH_CRSDV", "ETH_RXD0", "ETH_RXD1", "ETH_TXCK", // PE
			  "ETH_TXD0", "ETH_TXD1", "ETH_TXEN", "",
			  "ETH_MDC", "ETH_MDIO", "QWIIC_nINT", "",
			  "", "", "", "",
			  "", "", "", "",
			  "", "", "", "",
			  "", "", "", "",
			  "", "", "", "",
			  "SD_D1", "SD_D0", "SD_CLK", "SD_CLK", // PF
			  "SD_D3", "SD_D2", "PF6", "",
			  "", "", "", "",
			  "", "", "", "",
			  "", "", "", "",
			  "", "", "", "",
			  "", "", "", "",
			  "", "", "", "",
			  "ESP_CLK", "ESP_CMD", "ESP_D0", "ESP_D1", // PG
			  "ESP_D2", "ESP_D3", "UART1_TXD", "UART1_RXD",
			  "ESP_nBOOT", "ESP_nRST", "I2C3_SCL", "I2C3_SDA",
			  "I2S1_WS", "I2S1_CLK", "I2S1_DIN0", "I2S1_DOUT0",
			  "", "", "", "",
			  "", "", "", "",
			  "", "", "", "",
			  "", "", "", "";
};

/* Remove the unused CK pin from the pinctl as it is unconnected */
&rmii_pe_pins {
	pins = "PE0", "PE1", "PE2", "PE3", "PE4",
	       "PE5", "PE6", "PE8", "PE9";
};

/* Default SPI Interface on Card-Edge */
&spi1 {
	#address-cells = <1>;
	#size-cells = <0>;
	pinctrl-0 = <&spi1_pins>, <&spi1_hold_pin>, <&spi1_wp_pin>;
	pinctrl-names = "default";
	cs-gpios = <0>;
	status = "disabled";
};

/* Connected to the Bootloader/Console of the ESP32 */
&uart1 {
	pinctrl-0 = <&uart1_pg6_pins>;
	pinctrl-names = "default";
	status = "okay";
};

/* Console/Debug UART on Card-Edge */
&uart3 {
	pinctrl-0 = <&uart3_pb_pins>;
	pinctrl-names = "default";
	status = "okay";
};